ISP Information:
A piece of fast memory that sits between the L1 cache of the processor and main memory. It is usually larger than L1 cache, and the L1 cache checks the L2 cache before going to main memory for data (unless the L1 and L2 caches are unified--see unified cache). Nowadays L2 caches are almost always on the same die as the microprocessor, but they can be off-chip.
ISP Glossary:
L2 cache - On Tue, 28 Oct 2003 16:45:07 -0800, "Ron" wrote:Me, you're wrong. Every now & then JPI cross posts his nonsense into AHM. Aswell, JPI admittedly uses many anon socks to stir the pot. These recentthreads from ACF-S the last couple days were initiated by a known kook (95%sure not JPI). I'd be more than happy to end the correspondence.Don't bother on my account. Nobody else holds back from posting offtopic in AHM, why go against the flow? Heh.
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