ISP Information:
In some architectures, such as Socket 7, the speed of the backside bus determined how fast the microprocessor could talk to its external L2 cache. Newer architectures, such as Slot 1 and most architectures today, have a dedicated L2 cache bus (or dedicated on-chip L2 cache), and a backside bus is no longer required at all.
ISP Glossary:
Backside Bus - ... by their customers with huge numbers of requests for state refunds the ISPs don ... TheTennessee Department of Revenue denied our protests, however, and told us ... Original Article
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